Category:Opcodes

Programmer's model

• Registers
• Processor modes
• The Status register
• Conditional execution
• Shifts
• Addressing modes
• Vectors/Exceptions
• Interrupts
• Unaligned data access

ARM instructions

Base instruction set

ADC ADD AND B/BL BIC CMN CMP EOR LDM LDR/LDRB MLA MOV MUL MVN ORR RSB RSC SBC STM STR/STRB SUB SWI SWP TEQ TST

ARM6 and later

MRS MSR

Pseduo instructions

Shifts

ASL ASR LSL LSR ROR RRX

BBC BASIC assembler

ADR ALIGN DCB/DCW/DCD/DCS EQUB/EQUW/EQUD/EQUS OPT
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