ADC
Instruction | ADC[S] |
---|---|
Function | Add with Carry |
Category | Data processing |
ARM family | All |
Notes | - |
Contents |
ADC[S] : Add with Carry
ADC will add two values and the Carry flag.
Operand 1 is a register, operand 2 can be a register, shifted register, or an immediate value (which may be shifted).
If the S bit is set (ADCS), the N and Z flags are set according to the result, and the C and V flags are set as follows: C if the result generated a carry (unsigned overflow); V if the result generated a signed overflow.
ADC is useful for multiword addition, for example adding two 64 bit values. Use ADD for basic addition.
Syntax
ADC<suffix> <dest>, <op 1>, <op 2>
Function
dest = op_1 + op_2 + Carry
Example
If R0-R1 is a 64 bit value, and R2-R3 is another 64 bit value, the code below will add them, placing the result in R4-R5.
ADDS R4, R0, R2 ADC R5, R1, R3
Technical
The instruction bit pattern is as follows:
31 - 28 | 27 | 26 | 25 | 24 - 21 | 20 | 19 - 16 | 15 - 12 | 11 - 0 |
---|---|---|---|---|---|---|---|---|
condition | 0 | 0 | I | 0 1 0 1 | S | op_1 | dest | op_2/shift |
Note: If the I bit is zero, and bits 4 and 7 are both one (with bits 5,6 zero), the instruction is UMLAL, not ADC.