Registers
and
Processor Modes

 

The ARM processor has twenty seven registers, some of which have conditions applied, so you only get to use sixteen at any one time...

 

 

To make this a little clearer... Another chart:


User Mode  SVC Mode   IRQ Mode   FIQ Mode  APCS

R0 ------- R0 ------- R0 ------- R0        a1
R1 ------- R1 ------- R1 ------- R1        a2
R2 ------- R2 ------- R2 ------- R2        a3
R3 ------- R3 ------- R3 ------- R3        a4
R4 ------- R4 ------- R4 ------- R4        v1
R5 ------- R5 ------- R5 ------- R5        v2
R6 ------- R6 ------- R6 ------- R6        v3
R7 ------- R7 ------- R7 ------- R7        v4
R8 ------- R8 ------- R8         R8_fiq    v5
R9 ------- R9 ------- R9         R9_fiq    v6
R10 ------ R10 ------ R10        R10_fiq   sl
R11 ------ R11 ------ R11        R11_fiq   fp
R12 ------ R12 ------ R12        R12_fiq   ip
R13        R13_svc    R13_irq    R13_fiq   sp
R14        R14_svc    R14_irq    R14_fiq   lr
------------- R15 / PC -------------       pc
The rightmost column is a list of names used for APCS code, refer here for details of APCS assembler.

 

 

The Program Counter is built up as follows:

  Bit  31  30  29  28  27  26  25------------2  1  0

       N   Z   C   V   I   F   Program Counter  S1 S0
For further explanation of R15, refer to psr.html.

 

 

By now you may be wondering about these "modes", such as "FIQ" mentioned above.

The difference between IRQ and FIQ is with FIQ you have to process your stuff as quickly as possible and then get the .... out of there. An IRQ may be interrupted by an FIQ but an IRQ cannot interrupt an FIQ. To make FIQs faster, they have more shadow registers. FIQs cannot call SWIs. FIQs must also disable interrupts. If it becomes necessary for an FIQ routine to re-enable interrupts, it's too slow and should be IRQ not FIQ. Phew!

Refer to psr.html for details of how to change processor modes.


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Copyright © 2004 Richard Murray