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Registers and Processor Modes
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The ARM processor has twenty seven registers, some of which have conditions applied, so you only
get to use sixteen at any one time...
- Register 0 to register 7 are general purpose registers and can be used for ANY
purpose.
Unlike 80x86 processors which require certain registers to be used for stack access, or
the 6502 which places the result of mathematical calculations in the Accumulator, the ARM
processor is highly flexible in its register use.
- Register 8 to register 12 are general purpose registers, but they have shadow registers
which come into use when you switch to FIQ mode.
- Register 13 is typically the OS stack pointer, but can be used as a general purpose
register. This is an operating system issue, not a processor issue, so if you don't use
the stack you can corrupt this freely within your own code as long as you restore it
afterwards.
Each of the processor modes shadow this register.
- Register 14 is dedicated to holding the address of the return point to make writing
subroutines easier. When you branch with link (BL) the return address is stored in R14.
Likewise when the program is first run, the exit address is stored in R14. All instances
of R14 must be preserved in other registers (not really efficient) or in a stack. This
register is shadowed across all of the processor modes. This register can be used as a
general purpose register once the link address has been preserved.
- Register 15 is the program counter. It holds the status of the processor as well as a
twenty-six bit number which is the address of the program currently being used.
To make this a little clearer... Another chart:
User Mode SVC Mode IRQ Mode FIQ Mode APCS
R0 ------- R0 ------- R0 ------- R0 a1
R1 ------- R1 ------- R1 ------- R1 a2
R2 ------- R2 ------- R2 ------- R2 a3
R3 ------- R3 ------- R3 ------- R3 a4
R4 ------- R4 ------- R4 ------- R4 v1
R5 ------- R5 ------- R5 ------- R5 v2
R6 ------- R6 ------- R6 ------- R6 v3
R7 ------- R7 ------- R7 ------- R7 v4
R8 ------- R8 ------- R8 R8_fiq v5
R9 ------- R9 ------- R9 R9_fiq v6
R10 ------ R10 ------ R10 R10_fiq sl
R11 ------ R11 ------ R11 R11_fiq fp
R12 ------ R12 ------ R12 R12_fiq ip
R13 R13_svc R13_irq R13_fiq sp
R14 R14_svc R14_irq R14_fiq lr
------------- R15 / PC ------------- pc
The rightmost column is a list of names used for APCS code, refer
here for details of APCS assembler.
The Program Counter is built up as follows:
Bit 31 30 29 28 27 26 25------------2 1 0
N Z C V I F Program Counter S1 S0
For further explanation of R15, refer to psr.html.
By now you may be wondering about these "modes", such as "FIQ" mentioned
above.
- User Mode, the usual mode for applications to run in. Your memory access is restricted and
you cannot read directly from hardware devices.
- Supervisor Mode (SVC Mode), used mainly by SWIs and the OS. This mode has additional
privileges which allow greater control of the computer. For example, you have to
go to Supervisor Mode in order to read from a podule. It cannot be done in User Mode.
- Interrupt Mode (IRQ Mode), used to handle peripherals that issues interrupts. This
mode is also privileged. Such devices causing IRQs are the keyboard, the VSync (when
the screen refresh is occurring), IOC timers, serial, harddisc, floppy etc etc...
- Fast Interrupt Mode (FIQ Mode), used to handle peripherals that issue fast interrupts.
This mode is also privileged. Such devices causing FIQs are the floppy disc handling
data, the serial port (on 82C71x machines such as the A5000) and Econet.
The difference between IRQ and FIQ is with FIQ you have to process your stuff as quickly as
possible and then get the .... out of there. An IRQ may be interrupted by an FIQ but an IRQ
cannot interrupt an FIQ. To make FIQs faster, they have more shadow registers. FIQs cannot call
SWIs. FIQs must also disable interrupts. If it becomes necessary for an FIQ routine to re-enable
interrupts, it's too slow and should be IRQ not FIQ. Phew!
Refer to psr.html for details of how to change processor modes.
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Copyright © 2004 Richard Murray