The Acorn Teletext Adapter
How It Works

Please note...

I have no source codes or circuit diagrams, so details are sketchy at present.
If you can help, please email me!



The wedge is opened by two screws at the back and one underneath, very reminiscent of the BBC microcomputer itself.

Innards (1); JPEG 38K
In the above picture, we are looking from the front right of the main circuit board. Further to the front is the power supply.
The long white thing along the front left is the 1MHz bus ribbon cable. Directly behind that is the tuner. We'll talk about this later.
The two big ICs, roughly in the middle, are the SAA 5020 TIC (closer) and the SAA 5030 VIP (to the back). The crystal you can see near the VIP provides the 6MHz clock pulse that is common to all teletext receivers.
The right side of the board is taken up with two memory ICs and a hell of a lot of 74-series logic. You can see at the front-right is an extra-ordinary linkage arrangement. I don't know if this is present for some sort of configuration, or if this is a really bizarre way to expand the receiver's memory capabilities.

The adapter plugs into the 1MHz bus, and according to a data sheet for the Electron, it is addressed from &FC10 to &FC13. These addresses are fixed because it is technically possible to daisy-chain devices on the 1MHz bus; though the teletext receiver does not support this with a loop-through socket (and neither does my EPROM programmer).
This does raise hopes that the 1MHz bus is faking I²C as you can't address a kilobyte of memory without nasty logic using only four bytes...
...assuming the first generation receiver even has I²C within it!


The tuner

Innards (2); JPEG 26K
The aerial plugs into the back of the receiver. In the above picture, you can clearly see what I mean when I call the tuning adjustment "twiddlies". They are big things. They are not 'stiff' so the slightest contact (even brushing a finger over them) will mess up the tuning.

Innards (3); JPEG 28K
The tuning is managed using a TDA 2541, which I assume sorts out which of the four tuning circuits to feed into the 'large metal box' demodulator. The output from the demodulator is fed into the big flat round metal thing (the SAW filter). This splits out the video from the demodulated feed using Surface Acoustic Wave principles. We'll ignore that as it is complex to explain. Suffice to say, the output is an IF signal. The IF signal is fed into the IC on the left which outputs a composite video signal.


Teletext reception

Innards (4); JPEG 28K
The video signal passes to the VIP (on the right). This outputs a serial data-stream and a clock signal. The clock signal is generated from a tuned circuit running at 6.9375MHz which is the bit rate of the teletext signal. Eight bits are broadcast, seven data bits and one parity bit. Each television line contains 360 bits (45 bytes). The first five bytes are a row address, while the remaining 40 bytes are a row of teletext data.
If a field (a half-frame of the interlaced television signal) only contains two lines for the teletext data, this means that only two rows are sent in every field. Since a page is 24 rows deep, it requires twelve fields, or 0.24 seconds to broadcast an entire page.
The 6.9375MHz clock is used to shift data out of the VIP and into the teletext data acquisition system.
The VIP also provides a 6MHz signal for the rest of the decoder, including a clock pulse which is generated every 64µs. The line period of 64µs is divided into 128 periods of 500ns which gives us our read/write signals.

We need combined read/write capabilities because a traditional teletext receiver needs to read the line data into memory and be able to display it at the same time. The cycles are alternately write and read, so there are 64 reads and 64 writes per line.

The following outline is for the EuroCCT, however this would have been influenced by earlier designs such as that used in the Acorn Teletext Adapter.

Forty read cycles are allocated for reading the display line, but this is not required in our hardware. Two cycles are allocated for reading data to the I²C bus. The maximum 100kHz bus speed corresponds to less than one byte read per line, two are allocated so the timing can be better organised.
There are 22 remaining read cycles. These are unallocated and unused.
Sixty write cycles are for writing the data. Although only forty bytes are to be written, the 6.9375MHz data rate means the data occupies 46µs. There is a further 1.4µs tolerance, so allowing 60 write cycles allows us to allocate the 40 (or 42) required cycles without running into problems. One write cycle is allocated for the I²C data, which is sufficient to cater for the bus running at it's maximum 100kHz speed. Actually, the modern I²C bus can go much faster these days, however 100kHz was its maximum back then...
A write cycle is allocated for the setting of the PBLF flag, plus another for inserting the colour code into row 0, column 7 - for the green rolling header that turns white when the page has been found. There is one write cycle left and this is unallocated and unused.


What exactly talks to memory?

The Video Input Processor, is responsible for converting the video input into a data-stream that represents the teletext signal.
Here, things get difficult. You see, the teletext receiver design printed in ETI (Electronics Today International) in the summer of '79 says:
About the VIP:
[...] The data acquisition section, divides the data from the VIP into its component parts. The Hamming-coded address words are checked, and words having a single wrong bit are corrected. Address words having two wrong bits are rejected. The row address of the incoming data line (one of twenty-four) is fed by this section to the 5-bit row address bus, and the character data is fed through the data to the memory as a sequence of forty 7-bit parallel words. A signal denoted as WOK (Write O.K.) indicates to the memory when valid data is to be written in, and a WACK (Write Address Clock) signal causes the address counters 74LS161 to step on after each character. The IC also contains circuits for the implementation of the control bits for the page header.
About the TAC:
The principal function of the data acquisition section of the TAC integrated circuit is to process the teletext data so that it can be written into the memory. [...]
You can read the entire article at and look in the time-line for the ETI decoder.
The text quoted above was taken from this site. I have taken the liberty of correcting the spelling (which appears to be 'odd' in a way that suggests OCR was used, like "cornponent" instead of "component").
Either way, I have not read all of, though what I have seen so far has been an interesting and detailed account of teletext - many thanks to Mike Brown for doing this!

Meanwhile... the Philips "Computer Controlled Teletext" user manual (issue 1, Jan. 1984) says, in its description of the first-generation LSI decoder:

VIP (Video Input Processor) (SAA 5030), a bipolar linear device which provides serial data and clock derived from the incoming video signal; it also arranges timing synchronisation for the rest of the decoder.
TAC (Teletext data Acquisition and Control) (SAA 5040), a digital NMOS device which arranges the capture of the requested page into memory. It is also concerned with overall decoder control, and writing user status into memory.
This, then, obviously raises the question of what exactly talks to the memory? Is it the VIP or is it the TAC? The VIP2 (second generation) simply outputs a data-stream and clock, while the EuroCCT works out what to receive, thus I am inclined to think that the VIP (first generation) doesn't talk to memory.
Certainly, the circuit diagram provided for the ETI receiver does not indicate any direct connection between the VIP and the memory.

You might wonder why I'm getting hung up over this. The answer is quite simple - it is because the Acorn Teletext Adapter has no TAC! This would imply that something else is performing the functions of the TAC; perhaps the BBC micro itself. Given the clock rate of the 1MHz bus is... guess what... 1MHz, and the data from the VIP is clocked out at a smidgen over 6MHz, it implies something interesting is happening.
Unfortunately the pins are not numbered in the circuit diagram of the ETI receiver, so I cannot try to follow where they go in the Acorn adapter.


Computer interface and software

Currently, I have no idea. I'll write about it when I find out some details!



If you plan to 'play' with your receiver (if you have one) then please please take note - the voltages contained within are +5V, which is not unexpected, and +12V, which again is not unusual. What is unusual, and what you should be careful with, is the +40V (yes, forty!) supply for the tuning 'twiddlies'.
Innards (5); JPEG 32K
As you can see (it is the one on the right), Acorn had a peculiar way of writing '4', a way that was more reminiscent of an 'L'. This in itself is potentially dangerous as 'L' means something on circuit boards (I think it means 'inductor', but my memory isn't so good!). Never mind, just remember the +40V is there. It winds its way across the bottom of the board (near the bus cable). At that corner it comes topside and tracks along past the tuner metal-box and finally finds its way into the tuning variables.


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Copyright © 2004 Richard Murray