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Amélie
system schematics
There are currently no complete system
schematics.
Early system
schematic
This is a very early design that was entirely drawn in
!DrawPlus - eek! The memory decode was intended as a
separate plug-in board, and the processor I/O was designed as
being three separate connectors (and the entire address bus
wouldn't be available)...
If you look really
closely, you might spot the 'deliberate'
error!
Address
decoder
One of the first parts of
Amélie to be figured out was the address decoder. I
imposed a three-IC limit, and one IC was going to be a 3-to-8
demux, which left space for two standard logic ICs.
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